- new arch also found in 20080195844*, 20090024836, 20090019263, 20090006814, ...
- distributed dispatch with concurrent OoO dispatch, a more relaxed scheme, 4 way decoders (20080195846)
- 4 way decoders again, implemented in a way to separate immediates and displacements (20090006814)
- AGU with operand recycling to be able to use 2 operand adders (20070011432)
- redirect recovery cache (20080195844)
- reduces branch misprediction penalty bypassing all stages before map
- speeds up loop execution, but not that much, since loop predictors would also keep the pipeline filled
- leaves fetch/decode bandwith for other sub cores
- although I saw a relation of U.S. Pat. No. 6944744 to K10 years ago (confirmed by Hans de Vries), it might also cover Bulldozer's shared FPU
- 3 operand extensions for x86 (20090031116)
- hierarchical microcode store (20090024836)
Maybe interesting to note: Sean Lie, who is mentioned in several patent applications, was working on transactional memory not so long ago. It will certainly be interesting to watch, if there will be some relation between his former research and that at AMD.
* Users registered on http://www.freepatentsonline.com/ may simply click on the links to open the pdf.