BOINC is indeed doing double precision floating point calculations during the floating point benchmark as can be seen in the source code. Thanks, Alex. So the BOINC results of Ontario (Bobcat core) indicate a rather high DP throughput for a mobile CPU core. It is possible that the FPU contains a multiplier like the one described in the paper I mentioned in my last blog entry. You can read it in full here. Thanks, Hans.
After looking at the Whetstone code I found that additions and subtractions play a bigger role than multiplications and there are also several divisions and even square root, and transcendental and trigonometric functions. The add/sub instructions shouldn't have a lower throughput like DP multiplications. And I remembered another paper, covering the division algorithm. You can read it here. The described Goldschmidt division algorithm achieves a rather low latency using the rectangular multiplier.
Comparing the Bobcat core to an Atom core at 1.66 GHz (as this one), the benchmarked Bobcat cores are about 2x the integer performance and 3x the FP performance of Atom. Thanks, informal.
And if you haven't noticed, there is a list of sockets and specs for AMD's Fusion MPU lineup. Some news sites use this data to produce multiple news bits, but sometimes it's better to go back to the source and get it all at once. In this list you'll find 3 core Llanos like the one tested with BOINC. The TDPs for the FT1 socket (Ontario, family 20 or 14h) indicate a possible TDP between 9 and 20 W for a dual core. This includes the GPU part and some uncore stuff.